<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom" xmlns:content="http://purl.org/rss/1.0/modules/content/"><channel><title>Limit Cycles on SignalForge Engineering Notes</title><link>https://blog.signal-forge.app/tags/limit-cycles/</link><description>Recent content in Limit Cycles on SignalForge Engineering Notes</description><generator>Hugo</generator><language>en-us</language><lastBuildDate>Thu, 26 Feb 2026 00:00:00 +0000</lastBuildDate><atom:link href="https://blog.signal-forge.app/tags/limit-cycles/index.xml" rel="self" type="application/rss+xml"/><item><title>Limit Cycles in IIR Filters: Hidden Instability in Fixed-Point DSP Systems</title><link>https://blog.signal-forge.app/posts/limit-cycles-iir-filter-fixed-point/</link><pubDate>Thu, 26 Feb 2026 00:00:00 +0000</pubDate><guid>https://blog.signal-forge.app/posts/limit-cycles-iir-filter-fixed-point/</guid><description>Limit cycles cause persistent oscillations in fixed-point IIR filters even with zero input. This article explains the numerical causes and engineering strategies for mitigation.</description></item><item><title>Embedded DSP Filter Stability: FIR vs IIR, High-Q Risk, Fixed-Point Failure Modes</title><link>https://blog.signal-forge.app/posts/fixed-point-dsp-filter-stability/</link><pubDate>Thu, 19 Feb 2026 00:00:00 +0000</pubDate><guid>https://blog.signal-forge.app/posts/fixed-point-dsp-filter-stability/</guid><description>A practical engineering framework for stability in embedded DSP filters: mathematical vs numerical vs system stability, high-Q IIR risk, fixed-point limit cycles, FIR vs IIR tradeoffs, and deployable decision rules.</description></item></channel></rss>